There are cases of application for integrated circuits (ICs) and sensors in particular, in which a “small” EEPROM memory with a magnitude of about 10-1000 bits is integrated in an integrated circuit. Examples are integrated circuits for analog applications, in which, however, extremely high accuracy is achieved only because of a calibration after a package process, i.e. after a chip with the integrated circuit was housed in a package, for example by casting. Such a housing process is also referred to as package process. The most prominent examples of such integrated circuits with a small EEPROM memory (EEPROM=electrically erasable programmable read-only memory) for analog applications are maybe integrated sensors, such as pressure sensors and magnetic field sensors. However, integrated circuits that have to measure and monitor voltages of rechargeable batteries in a very exact way also belong to this group.
Since the EEPROM memory of such an integrated circuit is comparatively small-sized as compared to a “pure” memory device whose substantial purpose of usage is the storage of data, and the whole integrated circuit and/or the whole IC is rather “small” and compact, an effort is made to avoid the otherwise usual high control effort for providing, for example, the programming voltage, both for reasons of performance and for reasons of cost. It is often usual to generate the necessary programming voltages and the necessary programming ramps not on the chip itself, i.e. on-chip, as it is done in larger memories in the kilobyte range (KB range) and the megabyte range (MB range) with complex charge pump arrangements, but to provide them to the chip externally via a pin and/or a pad.
In addition, it is necessary to detect the charge state and/or the storage capability and/or also other memory properties of each bit of the EEPROM memory at least for test purposes. Such a test is the so-called margin test, in which a test voltage Vmargin (margin voltage) is connected to the same pin to which there is also applied the programming voltage when the EEPROM memory is programmed. In the case of the margin test, this voltage is connected through to a control gate of an EEPROM cell by the same switches as this is also done with the programming circuit in the programming case. As soon as the voltage at the pin has stably settled, a read-out impulse (latch impulse) is communicated and/or transferred to the integrated circuit. Then the charge state of the EEPROM cell is digitally evaluated by the latch impulse. Afterwards, this digital evaluation of the charge state is communicated to the outside as a digital value, for example via the data interface of the integrated circuit.
In this context, it is particularly disadvantageous and problematic that the voltage at the respective pin, i.e. the programming pin, has to be settled very precisely, so that there will advantageously be no corruption of characteristic voltages with respect to the EEPROM cell, or only very little corruption.
However, this takes some time, because relatively long lines and/or leads of the tester, with whose help such a test is performed, are applied to the pin. The length of such a settling phase is significantly influenced by the electrical properties of the tester, the leads and the integrated circuits. These properties include, among other things, the electric resistance, the electric capacitance and the electric inductance of the leads.